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This section examines leakage inductance, describing what it is, what it does, why it needs to be minimised and how to reduce it's effects.
What Is It?
Leakage inductance is a parasitic component of transformer design caused by poor coupling between windings. This leads to small amouns of magnetic flux "leaking" out and not being transferred to other windings. It appears electrically as a separate inductor in series with the windings and causes problems.
Primarily, in SSTC applications, we are concerned with the amount of ringing caused by the leakage inductance resonating with the gate input capacitance of the switching device (this is illustrated in a series of SPICE simulations below). With ringing, there are a few main concerns:
This needs to be avoided as the intended input signal is totally overridden by the ringing, making the waveform useless, as shown in the waveform on the right. In fact, red waveform, if appearing on a MOSFET gate, wold turn the device on and off multiple times during one switching period.
Leakage inductance also causes a time delay in the signal which can be seen in the above waveform as the phase difference between the input waveform (green) and the output waveform (red). This is because the voltage across an inductor cannot change instantaneously - the larger the leakage inductance, the larger the time delay. This is examined below in relation to the possibility of it causing shoot through conditions.
Trace inductance is the parasitic inductance of the traces connecting the driver to the GDT and the GDT to the MOSFET gate-source terminals. It has a similar effect to leakage inductance in that is causes ringing and time delays. This can be minimised by using short, wide tracks as connections between driver, GDT and MOSFET and also by keeping the current loop area small.
Ribbon cable, with alternate + and - wires also has quite a low inductance, as does tightly twisted wires. Double sided PCB, with the gate trace on the top layer and the return on the bottom will also have a low parasitic inductance. Keep those loops small!
Some basic simulations were performed using SIMetrix Spice v4.2 (Demo) to get a feel for what effects leakage inductance can have and what can be done from a circuit point of view to reduce it.
A pulse voltage source was used to simulate the drive signal, with a 1 ohm resistor to simulate source and any impedance in the tracks caused by resistance of the copper or an inserted resistor. The 5nF capacitor (set to an initial voltage of 0V) represents the input capacitance of a power FET (we are assuming it is linear for this example). 100ns rise / fall times are used for these simulations.
With No Series Inductance
The most important thing to not here is that there is no ringing on the top (overshoot) or the bottom (undershoot) of the waveform. This is an ideal situation.
With Some Series Inductance
So now we introduce leakage inductance, simulated by a series inductor in the circuit. The value of 100nH represents a reasonably good transformer design. This inductance causes some ringing on the top and bottom of the waveform and causes a very small degree of phase delay. The ringing is not enough to breakdown the gate of an average power MOSFET and also not enough to turn it back on again on the first ring after the falling edge.
With Larger Series Inductance
And this is what happens when the inductance increases by a factor of 10 to 1uH. The ringing (red) destroys the original waveform (green) and will cause multiple on/off transitions of the driven device. This is of no use in our intended application. I've seen Coilcraft GDTs do this when driven hard, as they have a specified maxiximum leakage inductance of 4uH.
With A Series Damping Resistor
However, this ringing can be easily reduced (but not removed) by increasing the series damping resistor value - to 10 ohms in this case. This reduces the Q of the tuned circuit formed by the leakage inductance and the input capacitance, reducing the ringing amplitude and frequency.
However, the ringing peaks are still signficant and, more importantly, the rise time on the gate has been slowed. This means the time spent in the linear region of switching is increased, resulting in more devie heating.
Using the circuit with the 100nH leakage inductance above, the input rise and fall times were varied to judge the effect on the ringing.
Above: 25ns rise time, 20V peak ring
Above: 50ns rise time, 18V peak ring
Above: 100ns rise time, 15V peak ring
These measurements show how a fast slew rate injects more energy into the tuned circuit, causing larger amounts of ringing. The peak values for each of these circuits can be seen to reduce in value the slower the input slew rate gets from 8V overshoot at 25ns rise to about 2.75V overshoot at 100ns.
So, for fast switching we need low leakage inductance to reduce ringing and reduce the risk of damage to our switching devices and to ensure correct operation of our half bridge.
Conclusion: There is no substitute for a decent transformer design in the first place!